Ali Attaran works on a range of intellectual property matters, focusing primarily on patent preparation and patent prosecution. Ali has prosecuted numerous patent applications for several Fortune 100 technology companies.
Ali has technical backgrounds in electrical engineering, computer engineering, and telecommunication technologies; and has more than 6 years industrial experience in several areas including but not limited to wireless communication technologies, Application Specific Integrated Circuit (ASIC) systems, analog and digital Integrated Circuit (IC) devices, non-volatile memory devices, sensors, Artificial Intelligence (AI) algorithms, Internet-of-Things (IoT) systems, hardware and firmware systems, mechanical devices, and medical devices.
Ali has 9 issued patents related to wireless communication devices, IC devices, and sensors; and has published 31 journal and conference papers.
Prior to joining Baker Botts, Ali was a scientific advisor where he prosecuted patent applications for several Fortune 100 technology companies. Prior to that, Ali has worked as an ASIC engineer at Western Digital and as a research scientist in a research center at San Francisco State University.
As an ASIC engineer at Western Digital, Ali has worked on active projects such as an Enhanced Solid State Drive (eSSD) 2-chip solution interface where he was in the ASIC design team, synthesizing and verifying in-house chips for next generation SSD memory devices. In general terms, the eSSD 2-chip solution interface has increased the access, sensing, read, and write times by implementing 2 interfacing Non-Volatile Memory express (NVMe) modules with the SSD memory device.
As a research scientist at San Francisco State University, Ali has worked on DARPA-funded projects such as developing programmable logic gates where he designed static and dynamic non-volatile lookup tables (LUTs) utilizing Magnetic Tunnel Junctions (MTJs) as memory cells with 0.0001% read, write and sensing failure rates. One of the goals of this project was to implement programmable logic gates in a chip where the logic gates can be programmed after fabrication of the chip, so that the chip operates as intended. Hence, a third party or a manufacturing company would not be able to reverse-engineer the functionalities of a chip by copying the chip's layout.
